The present invention relates to programming programmable elements such as anti-fuses used in integrated circuits, and more particularly to a method and apparatus for coupling an externally applied, relatively large programming voltage to programmable elements for a sufficient duration to allow sequentially programming a large number of the programmable elements.
Programmable elements such as anti-fuses are a common component in conventional integrated circuits. An anti-fuse is a circuit element that is normally open circuited until it is programmed at which point the anti-fuse assumes a relatively low resistance. Anti-fuses are commonly used to selectively enable certain features of integrated circuits and to perform repairs of integrated circuits. Features of integrated circuits are selected by, for example, xe2x80x9cblowingxe2x80x9d anti-fuses in a mode register to generate signals that alter the operation of the integrated circuit. Repairs of integrated circuits are typically accomplished by blowing anti-fuses to signal defective portions of the integrated circuit that they should be replaced with redundant circuits. For example, a defective row of memory cells in the array of a dynamic random access memory can be replaced with a redundant row of cells provided for that purpose.
Conventional anti-fuses are similar in construction to capacitors in that they include a pair of conductive plates separated from each other by a dielectric or insulator. Anti-fuses are typically characterized by the nature of the dielectric, which may be, for example, oxide or nitride. Anti-fuses are programmed or xe2x80x9cblownxe2x80x9d by applying a differential voltage between the plates that is sufficient to break down the dielectric thereby causing the plates to contact each other. Typically at least one voltage used to provide this differential voltage is applied to the chip externally through terminals that are normally used for other purposes. For example, in a dynamic random access memory (xe2x80x9cDRAMxe2x80x9d) device, a high voltage may be applied to one of the data bit terminals after the integrated circuit has been placed in a programming mode by, for example, applying a predetermined combination of bits to other terminals of the integrated circuit.
Although conventional anti-fuses as described above have worked well in many applications, their use nevertheless may create several problems, particularly when used in more recent, high-density integrated circuits. In particular, the programmed resistance of anti-fuses varies over a considerable range, and the programmed resistance may be far higher than is desired. For example, the programmed resistance may be high enough that circuitry connected to the anti-fuse mistakenly determines that the anti-fuse is open circuited. It is generally known that programming anti-fuses with a higher current will both lower the programmed resistance and provide a more uniform resistance. However, the magnitude of the programming voltage that can be applied to anti-fuses is severely limited by the presence of other circuitry in the integrated circuit. In particular, since the terminals on which the programming voltage is applied are typically used for other functions, excessive programming voltages can easily break down the gate oxide layers of MOSFET transistors connected to such terminal thereby making such transistors defective.
Excessive programming voltages can also exceed the breakdown voltage of bipolar transistors that are connected to the input terminals of integrated circuits to provide electrostatic discharge (xe2x80x9cESDxe2x80x9d) protection for the remaining components of the integrated circuit. While this problem can be alleviated to some extent by increasing the breakdown voltage of the bipolar ESD protection transistors, doing so may reduce the safety margin of the ESD protection. While the problem of breaking down gate oxide layers of MOSFET transistors and exceeding the breakdown voltage of bipolar ESD protection transistors could be alleviated to some extent by using dedicated terminals to program anti-fuses, doing so would further increase the already large number of terminals required for many semiconductor devices, such as DRAM devices. Furthermore, the problem would nevertheless remain because it would be difficult to isolate the programming voltage from the integrated circuit substrate. Failure to isolate the programming voltage from the substrate could cause excessive voltages to be coupled across the gate oxide layers of MOSFET transistors, even though the programming voltage was not applied directly to the gates of the transistors.
The problem of programming voltages breaking down the gate oxide layer of MOSFET""s is exacerbated by the wide range of operating voltages of typical integrated circuits. For example, recent integrated circuits are capable of operating with a supply voltage of 1.8 volts in order to minimize power consumption, but they must still be able to operate with a commonly used supply voltage of 3.3 volts.
The limited magnitude of programming voltages that can be applied to external terminals make it important to couple substantially all of the programming voltage to the anti-fuses that are to be programmed. However, since at least one voltage used to provide the differential programming voltage is generally applied through an external terminal that is also used for other purposes, an isolation circuit must be provided between the terminal and the anti-fuse. A MOSFET transistor is often used as an isolation circuit. For example, an NMOS isolating transistor can be used to couple a positive programming voltage to one plate of the anti-fuse. However, for the NMOS isolating transistor to pass the entire magnitude of the programming voltage, a positive voltage having a magnitude that is greater than the magnitude of the programming voltage must be applied to the gate of the NMOS isolating transistor. In fact, the voltage applied to the gate of the NMOS isolating transistor must exceed the positive programming voltage by a threshold voltage VT for the transistor to couple the full magnitude of the programming voltage to the anti-fuse. If a lesser voltage is applied to the gate of the NMOS isolating transistor, the voltage applied to the anti-fuse will be no greater than the voltage applied to the gate less the threshold voltage VT.
Several techniques have been used to apply a voltage to the gate of an NMOS isolation transistor that is VT larger than an externally applied programming voltage. One conventional approach is to use a xe2x80x9cbootstrapxe2x80x9d circuit, such as a capacitor coupled between the gate of the NMOS isolation transistor and a terminal of the transistor that is coupled to the anti-fuse. The capacitor can be either a discrete capacitor external to the isolation transistor or a parasitic capacitance internal to the isolation transistor. The bootstrap capacitor is charged to at least a relatively small positive bias voltage VB before the isolation transistor is turned ON. When the bootstrap transistor is turned ON, the voltage on the terminal of the transistor that is coupled to the anti-fuse increases, and this increase is coupled to the gate of the transistor through the capacitor. The voltage on the gate of the transistor thus increases to substantially the sum of the programming voltage and the bias voltage VB, thereby allowing the NMOS isolating transistor to couple the entire magnitude of the programming voltage to the anti-fuse.
A significant limitation on the use of a bootstrap capacitor is the limited duration in which the voltage applied to the gate of the isolation transistor remains above the programming voltage by at least the threshold voltage VT. More specifically, when the isolation transistor is initially turned ON, the voltage applied to the gate of the isolation transistor will be VP+VB, where VP is the programming voltage and VB is the bias voltage, which is assumed to be greater than the threshold voltage VT. However, as the charge on the capacitor leaks away, both internally and through external circuit components, the voltage applied to the gate of the isolation transistor decreases. In fairly short order, the capacitor discharges to the point where the voltage applied to the gate of the transistor is less than VP+VT. Thereafter, the isolation transistor can no longer couple the full magnitude of the programming voltage to the anti-fuse. Programming of additional anti-fuses can then require repetitive cycles of turning OFF the isolation transistor, re-charging the bootstrap capacitor, and again turning ON the isolation transistor. The time required to perform these multiple cycles can unduly increase the time required to program anti-fuses used in semiconductor devices.
Another conventional approach is to provide a semiconductor device using anti-fuses with a charge pump that generates a xe2x80x9csupervoltagexe2x80x9d having a magnitude that is larger than the sum of the programming voltage and the threshold voltage VT. The supervoltage is applied to the gate of the NMOS isolation transistor to couple the programming voltage to the anti-fuse. Since the supervoltage exceeds the programming voltage by at least the threshold voltage VT, the entire magnitude of the programming voltage can be applied to the anti-fuse.
The use of a charge pump avoids the problem of being able to couple the programming voltage to the anti-fuse for only a limited duration. However, it has the disadvantage of requiring a relatively large number of components in the charge pump, thereby increasing the cost of semiconductor devices using this approach. In particular, the amount of circuitry that must be used in the charge pump is a function of the number of voltage boosting stages contained in the charge pump. Since a relatively large number of voltage boosting stages are required to generate a supervoltage having a large magnitude, a large number of components must be used in the charge pump to generate a sufficiently large supervoltage.
Although these conventional isolation circuits have been explained in the context of applying a positive programming voltage to an anti-fuse through an NMOS isolating transistor, it will be understood that the same or similar problem may exist when applying a negative programming voltage to an anti-fuse through a PMOS transistor. Also, although the isolation circuits have been described as being coupled to an anti-fuse, it will be understood that the same or similar problem may exist when applying a programming voltage to other types of programmable elements, such as fuses.
There is therefore a need for an isolation circuit that uses relatively few components yet is capable of coupling substantially the entire magnitude of a programming voltage to an anti-fuse or other programmable element for an extended duration.
A charge pump according to the invention is used to supply a relatively large voltage to the control terminal of an isolation device, such as the gate of a MOSFET transistor, that couples a circuit ground node to an external terminal of an integrated circuit. A relatively large programming voltage is applied to the external terminal to allow one or more programmable element coupled to the circuit ground node to be programmed. At other times, the isolation device isolates the external terminal from the circuit ground node so that the external terminal can be used for other purposes. The charge pump generates the relatively large voltage by boosting the programming voltage so that relatively few boosting stages are required in the charge pump. The charge pump also preferably includes a precharge circuit to quickly apply a voltage to the control terminal of the isolation device when a programmable element is to be programmed. When the isolation device is not coupling the external terminal to the circuit ground, a grounding circuit maintains the circuit ground node at a predetermined voltage, such as ground potential.